1. Field of the Invention
This invention relates to a method and apparatus for debug in a multicore architecture.
2. Description of the Related Art
In recent years, there has been a trend towards producing processors containing multiple cores, in order to maximise silicon efficiency (i.e. “application-available” MIPs/mm2 or MIPs/mW). Such multicore architectures are ideally suited to running applications based on threads, because a thread defines an autonomous package of work containing an execution state, instruction stream and dataset, which, by definition, may execute concurrently with other threads. However, this concurrency of execution introduces additional problems into the software debug process used on these multicore architectures. Software debug is the general term for locating and correcting errors in the execution of a computer application.
One of the key problems faced in software debug is the Heisenberg bug (also known as the “probe effect”). Any code which is added for the purpose of debug, for example to increase the level of system diagnostics, is likely to subtly change the timing of concurrent and/or parallel executing threads. This brings with it the risk of masking bugs that would otherwise be observed in the production release of the same application. It is also difficult to extract meaningful performance measurements and instrumentation when extensive debug code is present in the build. This is because second order effects like cache and bus performance may be affected by the additional code, as well as it having the more obvious impact on code size.
Additionally, there is an increasing demand for improving the reusability of the software produced for such multicore architectures, due to the extensive resources used in its production. In the past, applications for multicore architectures have been written on a bespoke basis, thus producing hardware specific applications with little portability. In extension, the debug of these applications has also been very specialised.